use {readl|writel}_relaxed instead of readl/writel in i2c-designware-core ?

Jisheng Zhang jszhang at
Fri Feb 14 02:54:38 EST 2014

Hi all,

The writel/readl is too expensive especially on Cortex A9 w/ outer L2 cache. This
introduce i2c read/write error on Marvell Berlin SoCs when there are L2 cache
maintenance operations at the same time.

In our internal berlin bsp, we just replaced readl/writel with the relaxed
version. But AFAIK, the "relaxed" version doesn't exist on all architectures. How
to handle this issue? 

Any suggestions are appreciated.

Thanks in advance,

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