[RFC PATCH] ARM: Add imprecise abort enable/disable macro

Dave Martin Dave.Martin at arm.com
Mon Feb 10 12:28:56 EST 2014


On Mon, Feb 10, 2014 at 04:37:00PM +0000, Russell King - ARM Linux wrote:
> On Mon, Feb 10, 2014 at 04:28:22PM +0000, Dave Martin wrote:
> > On Mon, Feb 10, 2014 at 03:19:34PM +0000, Russell King - ARM Linux wrote:
> > > On Mon, Feb 10, 2014 at 02:42:28PM +0000, Dave Martin wrote:
> > > > Should we require CPSR.A to me masked in Booting, for all CPUs that have
> > > > it?
> > > 
> > > If it's not masked at boot, then there can't be an imprecise exception
> > > pending.
> > 
> > Couldn't there still be a dangling abort condition triggered by the
> > bootloader, which which doesn't raise the abort pin until after we
> > entered the kernel?
> 
> True, but the decompressor does disable them (see safe_svcmode_maskall),
> so any raised abort is likely to hit the boot loader's vectors at that
> time.  They remain masked into the kernel from that point.
> 
> If you're not using the decompressor then the A bit will be left as-is.
> 
> Given that we've not yet had any failures, I'm inclined to just let the
> status-quo be for the kernel entry - if it does cause problems then it's
> clear that the right solution is that the A bit must be disabled.

OK, that seems a reasonable view.

Cheers
---Dave



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