[RFC PATCH] ARM: Add imprecise abort enable/disable macro

Russell King - ARM Linux linux at arm.linux.org.uk
Mon Feb 10 10:24:52 EST 2014

On Mon, Feb 10, 2014 at 03:12:47PM +0000, Dave Martin wrote:
> Firstly, blindly adding 4 to PC is obviouly not right, partly because we
> might be running an unrelated thread by the time the abort fires, and
> also because the affected instruction might not be 4 bytes in size in a
> Thumb kernel.

Exactly.  We ended up on some platforms having special accessors for PCI
where we included a number of 'mov r0, r0' instructions after the accessor
so we could properly cope with them - but this required knowledge that
we were going to only receive an imprecise abort from these accessors
and only for a few cycles after the instruction.

However, that's not true with modern architectures.  The point they're
received will _not_ be the load/store which resulted in the abort, and
in the case of a write, they could be many hundreds of cycles later,
especially if the write has been buffered.

So adding four to the PC is definitely a very /bad/ thing to do.

FTTC broadband for 0.8mile line: 5.8Mbps down 500kbps up.  Estimation
in database were 13.1 to 19Mbit for a good line, about 7.5+ for a bad.
Estimate before purchase was "up to 13.2Mbit".

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