[PATCH 2/2] ARM: dts: sirf: add pin group for USP0 with only RX or TX frame sync for atlas6

Linus Walleij linus.walleij at linaro.org
Tue Feb 4 15:50:24 EST 2014

On Thu, Jan 30, 2014 at 6:54 AM, Barry Song <21cnbao at gmail.com> wrote:

> From: Rongjun Ying <rongjun.ying at csr.com>
> add pin groups for USP0 only holding one of TX and RX frame sync. this patch
> matches with the change in drivers/pinctrl/sirf.
> commit 73f68c01f46 did this for prima2, but missed prima2. this patch fixes
> the problem.
> Signed-off-by: Rongjun Ying <rongjun.ying at csr.com>
> Signed-off-by: Barry Song <Baohua.Song at csr.com>

Acked-by: Linus Walleij <linus.walleij at linaro.org>

Please take this patch through the ARM SoC tree.

Linus Walleij

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