[PATCH v2 1/1] net/macb: add TX multiqueue support for gem
David Laight
David.Laight at ACULAB.COM
Fri Dec 12 01:59:36 PST 2014
From: Cyrille Pitchen [...
> > It will probably add a lot of object code and, depending on how often
> > the registers are accesses, might have performance impact.
> >
> > Having:
> > #define GEM_ISR(n) (0x400 + (n) << 4)
> > will save source code.
> >
> > David
> >
> >
> >
> So you suggest that we keep the unsigned int fields ISR, IMR, IER, IDR, TBQP in
> the struct macb_queue and initialize them once for all in macb_probe() like
> patch v2 does but only replace the GEM_ISR1 .. GEM_ISR7 defines by GEM_ISR(n)
> in macb.h?
>
> This way there would be to test at run time and we can handle the special
> register mapping of queue0.
>
> Is it what you meant?
In one word, yes.
David
More information about the linux-arm-kernel
mailing list