[PATCH v3 04/16] clk: exynos5420: correct clock parents for mscl sysmmu

[Alim Akhtar]

Hi Shaik,

On Thu, Apr 24, 2014 at 6:33 PM, Shaik Ameer Basha
<shaik.ameer at samsung.com> wrote:
> Signed-off-by: Rahul Sharma <rahul.sharma at samsung.com>
> Signed-off-by: Shaik Ameer Basha <shaik.ameer at samsung.com>
> ---
Reviewed-by: Alim Akhtar <alim.akhtar at samsung.com>

>  drivers/clk/samsung/clk-exynos5420.c |   15 +++++++++------
>  1 file changed, 9 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/clk/samsung/clk-exynos5420.c b/drivers/clk/samsung/clk-exynos5420.c
> index c3c8ceb..9da85ac 100755
> --- a/drivers/clk/samsung/clk-exynos5420.c
> +++ b/drivers/clk/samsung/clk-exynos5420.c
> @@ -579,6 +579,9 @@ static struct samsung_div_clock exynos5420_div_clks[] __initdata = {
>                 DIV2_RATIO0, 4, 2),
>         DIV(0, "dout_gscl_blk_333", "aclk333_432_gscl", DIV2_RATIO0, 6, 2),
>
> +       /* MSCL Blk */
> +       DIV(0, "dout_mscl_blk", "aclk400_mscl", DIV2_RATIO0, 28, 2),
> +
>         /* ISP Block */
>         DIV(0, "dout_aclk400_isp", "mout_aclk400_isp", DIV_TOP0, 0, 3),
>         DIV(0, "dout_aclk333_432_isp0", "mout_aclk333_432_isp0",
> @@ -820,12 +823,12 @@ static struct samsung_gate_clock exynos5420_gate_clks[] __initdata = {
>         GATE(CLK_MSCL0, "mscl0", "aclk400_mscl", GATE_IP_MSCL, 0, 0, 0),
>         GATE(CLK_MSCL1, "mscl1", "aclk400_mscl", GATE_IP_MSCL, 1, 0, 0),
>         GATE(CLK_MSCL2, "mscl2", "aclk400_mscl", GATE_IP_MSCL, 2, 0, 0),
> -       GATE(CLK_SMMU_MSCL0, "smmu_mscl0", "aclk400_mscl", GATE_IP_MSCL, 8, 0,
> -               0),
> -       GATE(CLK_SMMU_MSCL1, "smmu_mscl1", "aclk400_mscl", GATE_IP_MSCL, 9, 0,
> -               0),
> -       GATE(CLK_SMMU_MSCL2, "smmu_mscl2", "aclk400_mscl", GATE_IP_MSCL, 10, 0,
> -               0),
> +       GATE(CLK_SMMU_MSCL0, "smmu_mscl0", "dout_mscl_blk",
> +                       GATE_IP_MSCL, 8, 0, 0),
> +       GATE(CLK_SMMU_MSCL1, "smmu_mscl1", "dout_mscl_blk",
> +                       GATE_IP_MSCL, 9, 0, 0),
> +       GATE(CLK_SMMU_MSCL2, "smmu_mscl2", "dout_mscl_blk",
> +                       GATE_IP_MSCL, 10, 0, 0),
>         GATE(CLK_SMMU_MIXER, "smmu_mixer", "aclk200_disp1", GATE_IP_DISP1, 9, 0,
>                 0),
>         /* gating of aclk300_gscl causes system hang. It should not be gated. */
> --
> 1.7.9.5
>
>
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-- 
Regards,
Alim