[PATCH] ARM: mm: dma: Update coherent streaming apis with missing memory barrier

[Russell King - ARM Linux]

On Thu, Apr 24, 2014 at 10:09:27AM +0100, Catalin Marinas wrote:
> If we only do D-cache maintenance by MVA, the ARM ARM (both v7 and v8)
> claims that these are ordered relative to any explicit load/stores to
> the same address. So in theory we don't even need a DMB for unmapping
> with DMA_FROM_DEVICE. But in practice, we may have the outer cache,
> hence a DSB is required before the outer_sync() (we could move it there
> though).

The general usecase for outer_sync() is: dsb(); outer_sync();  Why would
we want to change this to dsb(); dmb(); outer_sync(); (where the dmb is
in outer_sync itself?)

Seems more sensible for it to stay at the outer_sync() call site where
it's needed.

-- 
FTTC broadband for 0.8mile line: now at 9.7Mbps down 460kbps up... slowly
improving, and getting towards what was expected from it.