[PATCH 3/4] arm: add basic support for Mediatek MT6589 boards

Matthias Brugger matthias.bgg at gmail.com
Tue Apr 15 09:09:17 PDT 2014


2014-04-11 11:43 GMT+02:00 Marc Zyngier <marc.zyngier at arm.com>:
> On 11/04/14 10:11, Matthias Brugger wrote:
>> 2014-04-10 11:01 GMT+02:00 Marc Zyngier <marc.zyngier at arm.com>:
>>> A couple of things on top of Rob's comments:
>>>
>>> On Wed, Apr 09 2014 at 10:50:33 pm BST, Rob Herring <robherring2 at gmail.com> wrote:
>>>> On Wed, Apr 9, 2014 at 2:45 PM, Matthias Brugger <matthias.bgg at gmail.com> wrote:
>>>>> This adds a generic devicetree board file and a dtsi for boards
>>>>> based on the MT6589 SoCs from Mediatek.
>>>>>
>>>>> Apart from the generic parts (gic, clocks) the only component
>>>>> currently supported are the timers.
>>>>>
>>>>> Signed-off-by: Matthias Brugger <matthias.bgg at gmail.com>
>>>
>>> [...]
>>>
>>>>> diff --git a/arch/arm/mach-mediatek/Kconfig b/arch/arm/mach-mediatek/Kconfig
>>>>> new file mode 100644
>>>>> index 0000000..c0139ca
>>>>> --- /dev/null
>>>>> +++ b/arch/arm/mach-mediatek/Kconfig
>>>>> @@ -0,0 +1,14 @@
>>>>> +config ARCH_MEDIATEK
>>>>> +       bool "Mediatek MT6589 SoC" if ARCH_MULTI_V7
>>>>> +       select ARCH_REQUIRE_GPIOLIB
>>>>
>>>> Then where is your GPIO driver?
>>>>
>>>>> +       select ARM_GIC
>>>>> +       select CACHE_L2X0
>>>>> +       select HAVE_ARM_TWD if LOCAL_TIMERS
>>>
>>> Hell no! ;-) ARM_ARCH_TIMER is the way (please also add the missing
>>> node).
>>
>> I considered this, but the timer wasn't able to get it's clock frequency:
>> "Architected timer frequency not available
>> Division by zero in kernel."
>
> This is because your bootloader/firmware is utterly broken, and doesn't
> set CNTFRQ (it must be set on all CPUs, from secure mode). As a
> *workaround*, you can set the timer frequency in the timer node, but
> that's just a hack, and will prevent virtual machines from running on
> such hardware.

The last days I tried to get the ARM_ARCH_TIMER working, but I wasn't
able to do so.
I set the frequency in the DT node.
But reading CNTP_TVAL at the end of arch_timer_init, it always returns
the same value.
When reading CNTPCT at the same place, returns zero.
As far as I understand CNTPCT will be always incremented, am I right?

Consequently, when calling mdelay in arch_timer_init the system hangs.

So can it be, that the timers are not working due to a screwed up chip
design? Or do I miss something here?

>
>         M.
> --
> Jazz is not dead. It just smells funny...



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