[PATCH 2/2] spi: sirf: decrease the interrupt count and latency of PIO mode

[Mark Brown]

On Tue, Apr 15, 2014 at 03:25:00PM +0800, Barry Song wrote:

> +	for (;;) {

> +		writel(0, sspi->base + SIRFSOC_SPI_RXFIFO_OP);
> +		writel(0, sspi->base + SIRFSOC_SPI_TXFIFO_OP);
> +		if (sspi->left_tx_word == 0 && sspi->left_rx_word == 0)
> +			break;
> +	}

This would be clearer as a do { } while loop.  Otherwise this looks OK
from a first read through, though the diffstat is pretty horrible.
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