[PATCH] ARM: prima2: remove L2 cache size override

[Russell King - ARM Linux]

On Tue, Apr 15, 2014 at 05:49:02PM +0800, Barry Song wrote:
> From: Barry Song <Baohua.Song at csr.com>
> 
> L2 cache size has been read by l2x0_init(), it is useless to set
> WAY_SIZE and ASSOCIATIVITY in prima2.
> 
> Cc: Russell King <linux at arm.linux.org.uk>
> Signed-off-by: Barry Song <Baohua.Song at csr.com>
> ---
>  -Derived from Russell's "ARM: l2c: prima2: remove cache size override"

You're a SMP architecture... it would be much better to initialise the
L2 cache before the secondary CPUs are brought online.

In any case, across the board, it's preferable that the L2 cache is
enabled before the delay loop calibration as it can have an effect on
the calibrated value.

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