[RFC PATCH v2] edac: synopsys: Added EDAC support for zynq ddr ecc controller

Michal Simek michal.simek at xilinx.com
Thu Apr 10 03:10:54 PDT 2014


On 04/10/2014 12:00 PM, Borislav Petkov wrote:
> On Thu, Apr 10, 2014 at 11:49:57AM +0200, Michal Simek wrote:
>> I agree with you that we can use shorter name. I have checked this
>> with Punnaiah and I can't see any problem to have more edac drivers
>> in the system. For zynq there is primary ddr controller which is
>> target by this driver. Then we are talking about L2 in another thread.
>> Because zynq has programmable logic next to chip where you can add
>> soft memory controller (we have these hw designs) on the same bus then
>> there could be others edac drivers. I would say how many you like till
>> pins on the package.
> 
> I knew you were gonna say something like that! :-)

:-) good. We are getting famous by non standard cases.

> 
> Then you'll have to check whether edac can even stomach more than one
> drivers in parallel. TTBOMK, no one has ever done this so far... Yadda
> yadda.

It can there is just a problem with some IDs. :-)

> But before you do all that, you need to check whether edac is really
> what you're looking for, as I put it in my other mail.

If edac is the interface for reporting problems like this. It is probably
just a limitation of current edac core and should be fixed.

Thanks,
Michal





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