[PATCH] ARM: reinsert ARCH_MULTI_V4 Kconfig option
Russell King - ARM Linux
linux at arm.linux.org.uk
Wed Apr 9 08:27:11 PDT 2014
On Wed, Apr 09, 2014 at 05:13:26PM +0200, Uwe Kleine-König wrote:
> Hello Russell,
>
> On Wed, Apr 09, 2014 at 04:06:40PM +0100, Russell King - ARM Linux wrote:
> > On Wed, Apr 09, 2014 at 04:54:16PM +0200, Jonas Jensen wrote:
> > > On 13 December 2013 12:39, Russell King - ARM Linux
> > > <linux at arm.linux.org.uk> wrote:
> > > > I see what's causing this: the kuser helpers are using "bx lr" to return
> > > > which will be undefined on non-Thumb CPUs. We generally cope fine with
> > > > non-Thumb CPUs, conditionalising where necessary on HWCAP_THUMB or the
> > > > T bit in the PSR being set.
> > > >
> > > > However, it looks like the kuser helpers got missed. As a check, please
> > > > look at arch/arm/kernel/entry-armv.S, find the line with:
> > > >
> > > > .macro usr_ret, reg
> > > >
> > > > and ensure that the mov pc, \reg case always gets used. Please report
> > > > back.
> > >
> > > Uwe and Arnd came up with a solution except it doesn't work when I test it.
> > >
> > > The suggested patch is:
> > >
> > > diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
> > > index 1879e8d..de15bfd 100644
> > > --- a/arch/arm/kernel/entry-armv.S
> > > +++ b/arch/arm/kernel/entry-armv.S
> > > @@ -739,6 +739,18 @@ ENDPROC(__switch_to)
> > >
> > > .macro usr_ret, reg
> > > #ifdef CONFIG_ARM_THUMB
> > > + /*
> > > + * Having CONFIG_ARM_THUMB isn't a guarantee that the cpu has support
> > > + * for Thumb and so the bx instruction. Use a mov if the address to
> > > + * jump to is 32 bit aligned. (Note that this code is compiled in ARM
> > > + * mode, so this is the right test.)
> > > + */
> > > +#if defined(CONFIG_CPU_32v4)
> > > + tst \reg, #3
> > > + moveq pc, \reg
> > > + b .
> > > +#endif
> > > +
> > > bx \reg
> >
> > What's wrong with:
> > tst \reg, #3
> > moveq pc, \reg
> > bx \reg
> >
> > rather than ending in an infinite loop?
> The added b . was a test to check if the machine then hangs instead of
> crashing. (And yes, that was the case, so it was tried to return to a
> non-aligned address.)
If it's called from ARM code, then \reg will contain a 4-byte aligned
address. If it's called from Thumb code, \reg will contain a 2-byte
aligned address with bit 0 *always* set.
So, with the code originally quoted above, if the helper is called from
thumb code, and CONFIG_CPU_32v4 is enabled, then we end up falling past
the moveq to the "b ." and entering an infinite loop.
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