Help for doubt about why update SCTLR by cr_alignment every syscall,IRQ,exception ?

[Russell King - ARM Linux]

On Sat, Apr 05, 2014 at 01:41:17PM +0800, qixuan wu wrote:
> Dear King, all,
> 
> If we enable CONFIG_ALIGNMENT_TRAP:

This code in arch/arm/kernel/head-common.S:

        bicne   r4, r0, #CR_A                   @ Clear 'A' bit
        stmneia r7, {r0, r4}                    @ Save control register values

saves different values to cr_alignment and cr_no_alignment.  One always
has the A bit cleared, the other may have the A bit set.

For ARMv5 and older, we must have the A bit set while in the kernel so
misaligned loads are aborted, so that they can be fixed up.  This
behaviour is relied upon by the networking code amongst other places.

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