[PATCH 2/5] ARM: add SMP support for Broadcom mobile SoCs

Tim Kryger tim.kryger at linaro.org
Fri Apr 4 08:30:16 PDT 2014


On Thu, Apr 3, 2014 at 7:18 PM, Alex Elder <elder at linaro.org> wrote:

> diff --git a/arch/arm/mach-bcm/platsmp.c b/arch/arm/mach-bcm/platsmp.c
> new file mode 100644
> index 0000000..46a64f2
> --- /dev/null
> +++ b/arch/arm/mach-bcm/platsmp.c

> +/* Size of mapped Cortex A9 SCU address space */
> +#define SCU_SIZE               0x58

> +/*
> + * Enable the Cortex A9 Snoop Control Unit
> + *
> + * By the time this is called we already know there are multiple
> + * cores present.  We assume we're running on a Cortex A9 processor,
> + * so any trouble getting the base address register or getting the
> + * SCU base is a problem.
> + *
> + * Return 0 if successful or an error code otherwise.
> + */
> +static int __init scu_a9_enable(void)
> +{
> +       unsigned long config_base;
> +       void __iomem *scu_base;
> +
> +       if (!scu_a9_has_base()) {
> +               pr_err("no configuration base address register!\n");
> +               return -ENXIO;
> +       }
> +
> +       /* Config base address register value is zero for uniprocessor */
> +       config_base = scu_a9_get_base();
> +       if (!config_base) {
> +               pr_err("hardware reports only one core; disabling SMP\n");
> +               return -ENOENT;
> +       }
> +
> +       scu_base = ioremap((phys_addr_t)config_base, SCU_SIZE);
> +       if (!scu_base) {
> +               pr_err("failed to remap config base (%lu/%u) for SCU\n",
> +                       config_base, SCU_SIZE);
> +               return -ENOMEM;
> +       }
> +
> +       scu_enable(scu_base);
> +
> +       iounmap(scu_base);      /* That's the last we'll need of this */
> +
> +       return 0;
> +}

This function seems useful for Cortex A9 MPCore in general.

While you gave it a generic name, you put it in a Broadcom file.

Is there a better location for this code?



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