[PATCH v3 0/8] Add the Quadspi driver for vf610-twr
thomas.langer at lantiq.com
thomas.langer at lantiq.com
Wed Sep 4 09:45:40 EDT 2013
Hello Huang,
Huang Shijie wrote on 2013-09-05:
> On Wed, Sep 04, 2013 at 12:33:22PM +0100, Mark Brown wrote:
>> On Wed, Sep 04, 2013 at 06:29:34PM +0800, Huang Shijie wrote:
>>> 于 2013年09月04日 17:55, Mark Brown 写道:
>>>> On Wed, Sep 04, 2013 at 10:16:09AM +0800, Huang Shijie wrote:
>>
>>>>> Since this quadspi driver depends on the mtd code, could this driver
>>>>> goes to the kernel by
>>>>> the l2-mtd tree?
>>
>>>> Why would a SPI driver depend on MTD?
>>
>>> The patch 1-4 are for m25p80.c, and this quadspi controller drivers
>>> depends on the
>>> patch 1-4.
>>
>> In what way does the controller driver depend on those changes?
> This driver needs the spi nor command to fill the LUT register, such as
> OPCODE_WREN(0x06), so the patch 1 moves the spi nor command to a seprate
> header spi-nor.h, and this driver includes this new header.
>
Then some questions come up:
- Why does the spi controller need to know this?
- What is this LUT register at all?
- What happens if something different that a flash is connected and
the data starts with one of these opcodes?
Best Regards,
Thomas
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