[PATCH 1/7] PCI: imx6: Make reset-gpio optional
Marek Vasut
marex at denx.de
Tue Nov 26 16:10:42 EST 2013
Some boards do not have a PCIe reset GPIO. To avoid probe
failure on these boards, make the reset GPIO optional as
well.
Signed-off-by: Marek Vasut <marex at denx.de>
Cc: Bjorn Helgaas <bhelgaas at google.com>
Cc: Frank Li <lznuaa at gmail.com>
Cc: Harro Haan <hrhaan at gmail.com>
Cc: Jingoo Han <jg1.han at samsung.com>
Cc: Mohit KUMAR <Mohit.KUMAR at st.com>
Cc: Pratyush Anand <pratyush.anand at st.com>
Cc: Richard Zhu <r65037 at freescale.com>
Cc: Sascha Hauer <s.hauer at pengutronix.de>
Cc: Sean Cross <xobs at kosagi.com>
Cc: Shawn Guo <shawn.guo at linaro.org>
Cc: Siva Reddy Kallam <siva.kallam at samsung.com>
Cc: Srikanth T Shivanand <ts.srikanth at samsung.com>
Cc: Tim Harvey <tharvey at gateworks.com>
Cc: Troy Kisky <troy.kisky at boundarydevices.com>
Cc: Yinghai Lu <yinghai at kernel.org>
---
.../devicetree/bindings/pci/designware-pcie.txt | 2 +-
drivers/pci/host/pci-imx6.c | 29 +++++++++++-----------
2 files changed, 16 insertions(+), 15 deletions(-)
diff --git a/Documentation/devicetree/bindings/pci/designware-pcie.txt b/Documentation/devicetree/bindings/pci/designware-pcie.txt
index d5d26d4..b7a2279 100644
--- a/Documentation/devicetree/bindings/pci/designware-pcie.txt
+++ b/Documentation/devicetree/bindings/pci/designware-pcie.txt
@@ -19,9 +19,9 @@ Required properties:
to define the mapping of the PCIe interface to interrupt
numbers.
- num-lanes: number of lanes to use
-- reset-gpio: gpio pin number of power good signal
Optional properties for fsl,imx6q-pcie
+- reset-gpio: gpio pin number of power good signal
- power-on-gpio: gpio pin number of power-enable signal
- wake-up-gpio: gpio pin number of incoming wakeup signal
- disable-gpio: gpio pin number of outgoing rfkill/endpoint disable signal
diff --git a/drivers/pci/host/pci-imx6.c b/drivers/pci/host/pci-imx6.c
index bd70af8..52027ad 100644
--- a/drivers/pci/host/pci-imx6.c
+++ b/drivers/pci/host/pci-imx6.c
@@ -214,9 +214,12 @@ static int imx6_pcie_assert_core_reset(struct pcie_port *pp)
regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,
IMX6Q_GPR1_PCIE_REF_CLK_EN, 0 << 16);
- gpio_set_value(imx6_pcie->reset_gpio, 0);
- msleep(100);
- gpio_set_value(imx6_pcie->reset_gpio, 1);
+ /* Some boards don't have PCIe reset GPIO. */
+ if (gpio_is_valid(imx6_pcie->reset_gpio)) {
+ gpio_set_value(imx6_pcie->reset_gpio, 0);
+ msleep(100);
+ gpio_set_value(imx6_pcie->reset_gpio, 1);
+ }
return 0;
}
@@ -439,17 +442,15 @@ static int __init imx6_pcie_probe(struct platform_device *pdev)
/* Fetch GPIOs */
imx6_pcie->reset_gpio = of_get_named_gpio(np, "reset-gpio", 0);
- if (!gpio_is_valid(imx6_pcie->reset_gpio)) {
- dev_err(&pdev->dev, "no reset-gpio defined\n");
- ret = -ENODEV;
- }
- ret = devm_gpio_request_one(&pdev->dev,
- imx6_pcie->reset_gpio,
- GPIOF_OUT_INIT_LOW,
- "PCIe reset");
- if (ret) {
- dev_err(&pdev->dev, "unable to get reset gpio\n");
- goto err;
+ if (gpio_is_valid(imx6_pcie->reset_gpio)) {
+ ret = devm_gpio_request_one(&pdev->dev,
+ imx6_pcie->reset_gpio,
+ GPIOF_OUT_INIT_LOW,
+ "PCIe reset");
+ if (ret) {
+ dev_err(&pdev->dev, "unable to get reset gpio\n");
+ goto err;
+ }
}
imx6_pcie->power_on_gpio = of_get_named_gpio(np, "power-on-gpio", 0);
--
1.8.4.3
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