[PATCH 3/3] ARM: tegra: use section-sized static mappings for LPAE too

[Thierry Reding]

On Mon, Nov 25, 2013 at 03:36:43PM -0700, Stephen Warren wrote:
> From: Stephen Warren <swarren at nvidia.com>
> 
> The static mappings for Tegra's PPSB and APB regions were sized at 1MB
> in order to allow mapping via sections in order to avoid burning RAM for
> PTEs. On LPAE, sections are 2MB, so the static mappings need to be
> larger in order to gain the same benefit. Set IO_{PPSB,APB}_SIZE to
> SECTION_SIZE so this adjusts automatically.
> 
> While we're fiddling with iomap.h, compress IO_{IRAM,CPU}_VIRT together
> to save virtual address space in the vmalloc region; these two regions
> are mapped using PTEs.
> 
> Signed-off-by: Stephen Warren <swarren at nvidia.com>
> ---
>  arch/arm/mach-tegra/iomap.h | 14 +++++++-------
>  1 file changed, 7 insertions(+), 7 deletions(-)

Reviewed-by: Thierry Reding <treding at nvidia.com>
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