[RFT/RFC/PATCH 02/31] arm: omap: irq: define INTC_ILR0 register
Felipe Balbi
balbi at ti.com
Wed Nov 20 13:08:49 EST 2013
this is currently used as a hardcoded 0x100
offset.
Signed-off-by: Felipe Balbi <balbi at ti.com>
---
arch/arm/mach-omap2/irq.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index 748f86b..c9539b1 100644
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
@@ -41,6 +41,7 @@
#define INTC_MIR_CLEAR0 0x0088
#define INTC_MIR_SET0 0x008c
#define INTC_PENDING_IRQ0 0x0098
+#define INTC_ILR0 0x0100
/* Number of IRQ state bits in each MIR register */
#define IRQ_BITS_PER_REG 32
--
1.8.4.GIT
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