[PATCH v3 1/4] reset: Add Allwinner SoCs Reset Controller Driver
Maxime Ripard
maxime.ripard at free-electrons.com
Mon Nov 11 13:55:45 EST 2013
Hi Philipp,
On Mon, Nov 11, 2013 at 11:18:55AM +0100, Philipp Zabel wrote:
> > +static int sunxi_reset_assert(struct reset_controller_dev *rcdev,
> > + unsigned long id)
> > +{
> > + struct sunxi_reset_data *data = container_of(rcdev,
> > + struct sunxi_reset_data,
> > + rcdev);
> > + int bank = id / BITS_PER_LONG;
> > + int offset = id % BITS_PER_LONG;
> > + u32 reg = readl(data->membase + (bank * 4));
> > +
> > + writel(reg & ~BIT(offset), data->membase + (bank * 4));
>
> the reset core just passes through calls to reset_controller_assert
> directly, ...
>
> > +
> > + return 0;
> > +}
> > +
> > +static int sunxi_reset_deassert(struct reset_controller_dev *rcdev,
> > + unsigned long id)
> > +{
> > + struct sunxi_reset_data *data = container_of(rcdev,
> > + struct sunxi_reset_data,
> > + rcdev);
> > + int bank = id / BITS_PER_LONG;
> > + int offset = id % BITS_PER_LONG;
> > + u32 reg = readl(data->membase + (bank * 4));
> > +
> > + writel(reg | BIT(offset), data->membase + (bank * 4));
>
> ... so those read-modify-write cycles in sunxi_reset_assert and here
> should be protected with a lock.
Right, I'll fix this in the v3.
Thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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