[PATCH 0/2] genirq: arm64: perf: support for percpu pmu interrupt

Ganapat Rao P Kulkarni gpkulkarni at gmail.com
Mon Nov 11 07:33:38 EST 2013


Will,

armv8pmu_read_counter() and armv8pmu_write_counter() treats cycle
counter as 32 bit counter.
AFAIK, the cycle counter  on ARM64 is 64 bit and overflow interrupt
comes either 32 bit changes or when 64 bit flips.
and HRM says, ARM deprecates use of PMCR_EL0.LC = 0   => cycle counter
of 64 bit only

My understanding is perf's common code designed based on 32 bit cycle counters.
what is the plan? are we going to maintain the same logic of 32 bit
counter with  writing 1 to upper 32 bits of 64 bit counter?

Vinayak,

I think, it will be helpful if you mention in patch description about
changes needed in dts file (like PMUIRQ number, PPI mode etc) to
migrate to PMUv3 which is PPI.



regards
Ganapat
PS: Sending again, since my previous email was not plain-text.


On Mon, Nov 11, 2013 at 4:14 PM, Will Deacon <will.deacon at arm.com> wrote:
> On Sat, Nov 09, 2013 at 01:04:23AM +0000, Stephen Boyd wrote:
>> On 11/06/13 04:07, Vinayak Kale wrote:
>> > This patch series adds support to handle interrupt registration/deregistration
>> > in arm64 pmu driver when pmu interrupt type is percpu.
>> >
>> > Patches in this patch series were previously sent out as separate patches [1].
>> > This patch series incorporates comments/fixes suggested for original patches.
>> >
>> > [1]
>> > http://lists.infradead.org/pipermail/linux-arm-kernel/2013-October/205888.html
>> > http://lists.infradead.org/pipermail/linux-arm-kernel/2013-October/204414.html
>> >
>> > Vinayak Kale (2):
>> >   genirq: error reporting in request_percpu_irq() and
>> >     request_threaded_irq()
>> >   arm64: perf: add support for percpu pmu interrupt
>> >
>> >  arch/arm64/kernel/perf_event.c |  109 +++++++++++++++++++++++++++++-----------
>> >  kernel/irq/manage.c            |   12 +++--
>> >  2 files changed, 89 insertions(+), 32 deletions(-)
>> >
>>
>> What ever happened to the approach here[1]? It doesn't look very nice to
>> have to request the irq first as a per-cpu interrupt and then try as a
>> non-percpu interrupt when genirq already knows if its per-cpu or not.
>>
>> [1] http://lkml.indiana.edu/hypermail/linux/kernel/1207.3/02955.html
>
> Hmm, I'd completely forgotten about that approach. Whilst it certainly looks
> cleaner from a user perspective, I always get scared when I see
> 'desc->status_use_accessors' since it tends to incur the wrath of tglx :)
>
> That said, I guess that should be fine in irqdesc.h (basically adding a new
> accessor). Chris went missing after sending those initial patches, so
> perhaps Vinayak could look at resurrecting those?
>
> Will
>
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-- 
regards,
Ganapat



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