[PATCH] clk: add flags to distinguish xtal clocks

[Felipe Balbi]

From: Luciano Coelho <luca at coelho.fi>

Add a flag that indicate whether the clock is a crystal or not.

Additionally, parse a new device tree binding in clk-fixed-rate to set
this flag.

If clock-xtal isn't set, the clock framework will assume clock to be
generated by an oscillator.  There's only one user for this binding
right now which is Texas Instruments' WiLink devices which need to know
details about the clock in order to initialize the underlying WiFi HW
correctly.

Signed-off-by: Luciano Coelho <luca at coelho.fi>
Signed-off-by: Felipe Balbi <balbi at ti.com>
---

Dropped CLK_IS_TYPE_DEFINED flag and just assume that if the flag
isn't there, default behavior will be taken.

 Documentation/devicetree/bindings/clock/fixed-clock.txt | 1 +
 drivers/clk/clk-fixed-rate.c                            | 6 +++++-
 include/linux/clk-provider.h                            | 1 +
 3 files changed, 7 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/clock/fixed-clock.txt b/Documentation/devicetree/bindings/clock/fixed-clock.txt
index 0b1fe78..3036dfe 100644
--- a/Documentation/devicetree/bindings/clock/fixed-clock.txt
+++ b/Documentation/devicetree/bindings/clock/fixed-clock.txt
@@ -12,6 +12,7 @@ Required properties:
 Optional properties:
 - gpios : From common gpio binding; gpio connection to clock enable pin.
 - clock-output-names : From common clock binding.
+- clock-xtal: true when a clock is provided by a crystal
 
 Example:
 	clock {
diff --git a/drivers/clk/clk-fixed-rate.c b/drivers/clk/clk-fixed-rate.c
index 1ed591a..5db9bf0 100644
--- a/drivers/clk/clk-fixed-rate.c
+++ b/drivers/clk/clk-fixed-rate.c
@@ -91,13 +91,17 @@ void of_fixed_clk_setup(struct device_node *node)
 	struct clk *clk;
 	const char *clk_name = node->name;
 	u32 rate;
+	unsigned long flags = CLK_IS_ROOT;
 
 	if (of_property_read_u32(node, "clock-frequency", &rate))
 		return;
 
+	if (of_property_read_bool(node, "clock-xtal"))
+		flags |= CLK_IS_TYPE_XTAL;
+
 	of_property_read_string(node, "clock-output-names", &clk_name);
 
-	clk = clk_register_fixed_rate(NULL, clk_name, NULL, CLK_IS_ROOT, rate);
+	clk = clk_register_fixed_rate(NULL, clk_name, NULL, flags, rate);
 	if (!IS_ERR(clk))
 		of_clk_add_provider(node, of_clk_src_simple_get, clk);
 }
diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
index 73bdb69..30c0c37 100644
--- a/include/linux/clk-provider.h
+++ b/include/linux/clk-provider.h
@@ -29,6 +29,7 @@
 #define CLK_IS_BASIC		BIT(5) /* Basic clk, can't do a to_clk_foo() */
 #define CLK_GET_RATE_NOCACHE	BIT(6) /* do not use the cached clk rate */
 #define CLK_SET_RATE_NO_REPARENT BIT(7) /* don't re-parent on rate change */
+#define CLK_IS_TYPE_XTAL	BIT(8) /* this is a crystal clock */
 
 struct clk_hw;
 
-- 
1.8.4.1.559.gdb9bdfb