[PATCH 3/4] mfd: sec-core: Add cells for S5M8767-clocks

[Tushar Behera]

On 5 November 2013 13:27, Kyungmin Park <kmpark at infradead.org> wrote:
> On Tue, Nov 5, 2013 at 3:29 PM, Tushar Behera <tushar.behera at linaro.org> wrote:
>> On 31 October 2013 21:46, Lee Jones <lee.jones at linaro.org> wrote:
>>> On Thu, 31 Oct 2013, Tushar Behera wrote:
>>>
>>>> S5M8767 chip has 3 crystal oscillators running at 32KHz. These are
>>>> supported by s2mps11-clk driver.
>>>>
>>>> Signed-off-by: Tushar Behera <tushar.behera at linaro.org>
>>>> CC: Lee Jones <lee.jones at linaro.org>
>>>> ---
>>>>  drivers/mfd/sec-core.c |    4 +++-
>>>>  1 file changed, 3 insertions(+), 1 deletion(-)
>>>>
>>>> diff --git a/drivers/mfd/sec-core.c b/drivers/mfd/sec-core.c
>>>> index 34c18fb..020b86b 100644
>>>> --- a/drivers/mfd/sec-core.c
>>>> +++ b/drivers/mfd/sec-core.c
>>>> @@ -56,7 +56,9 @@ static struct mfd_cell s5m8767_devs[] = {
>>>>               .name = "s5m8767-pmic",
>>>>       }, {
>>>>               .name = "s5m-rtc",
>>>> -     },
>>>> +     }, {
>>>> +             .name = "s5m8767-clk",
>
> Do you want to handle these as "clock"? previous time, it's
> implemented at regulator. please see drivers/regulator/max* series.
>
> Thank you,
> Kyungmin Park

There is already a clock-implementation available for this kind of
device (through clk-s2mps11). I would like to extend that support.
Also for MAX77686, it is implemented through clock subsystem.

-- 
Tushar Behera