[PATCHv2 2/4] arm: dts: Add a system manager compatible property
dinguyen at altera.com
dinguyen at altera.com
Mon Nov 4 15:36:03 EST 2013
From: Dinh Nguyen <dinguyen at altera.com>
The "altr,sysmgr-sdmmc-sdr" compatible property is used for the SOCFPGA
clk-sysmgr driver. This property represents the register inside the
system manager that controls the clock phase of the SD/MMC driver.
Also add "syscon" to the system manager node.
Signed-off-by: Dinh Nguyen <dinguyen at altera.com>
CC: Arnd Bergmann <arnd at arndb.de>
Cc: Mike Turquette <mturquette at linaro.org>
CC: Olof Johansson <olof at lixom.net>
Cc: Rob Herring <rob.herring at calxeda.com>
Cc: Pawel Moll <pawel.moll at arm.com>
Cc: Mark Rutland <mark.rutland at arm.com>
Cc: Stephen Warren <swarren at wwwdotorg.org>
Cc: Ian Campbell <ian.campbell at citrix.com>
Cc: Chris Ball <cjb at laptop.org>
Cc: Jaehoon Chung <jh80.chung at samsung.com>
Cc: Seungwon Jeon <tgih.jun at samsung.com>
Cc: devicetree at vger.kernel.org
Cc: linux-mmc at vger.kernel.org
CC: linux-arm-kernel at lists.infradead.org
---
.../bindings/arm/altera/socfpga-system.txt | 10 ++++++++++
arch/arm/boot/dts/socfpga.dtsi | 12 ++++++++++--
2 files changed, 20 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-system.txt b/Documentation/devicetree/bindings/arm/altera/socfpga-system.txt
index f4d04a0..7a6c7ed 100644
--- a/Documentation/devicetree/bindings/arm/altera/socfpga-system.txt
+++ b/Documentation/devicetree/bindings/arm/altera/socfpga-system.txt
@@ -5,9 +5,19 @@ Required properties:
- reg : Should contain 1 register ranges(address and length)
- cpu1-start-addr : CPU1 start address in hex.
+Optional properties:
+- compatible = "altr,sysmgr-sdmmc-sdr". This compatible property is used
+to represent the clock phase settings for the SD/MMC IP.
+
Example:
sysmgr at ffd08000 {
compatible = "altr,sys-mgr";
reg = <0xffd08000 0x1000>;
cpu1-start-addr = <0xffd080c4>;
+
+ sysmgr_sdr_mmc: sysmgr_sdr_mmc {
+ #clock-cells = <0>;
+ compatible = "altr,sysmgr-sdmmc-sdr";
+ reg = <0x108 1>;
+ };
};
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index e273fa9..eb990d2 100644
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -521,8 +521,16 @@
};
sysmgr at ffd08000 {
- compatible = "altr,sys-mgr";
- reg = <0xffd08000 0x4000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "altr,sys-mgr", "syscon";
+ reg = <0xffd08000 0x4000>;
+
+ sysmgr_sdr_mmc: sysmgr_sdr_mmc {
+ #clock-cells = <0>;
+ compatible = "altr,sysmgr-sdmmc-sdr";
+ reg = <0x108 1>;
};
+ };
};
};
--
1.7.9.5
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