ARM Cortex-A7 support in Linux

[Will Deacon]

On Fri, May 17, 2013 at 12:42:11PM +0100, Marc Zyngier wrote:
> On 17/05/13 12:36, Will Deacon wrote:
> > On Fri, May 17, 2013 at 11:55:00AM +0100, Russell King - ARM Linux wrote:
> >> On Fri, May 17, 2013 at 12:47:45PM +0200, Marc Zyngier wrote:
> >>> It depends which feature you're after. Linux supports the GIC
> >>> virtualization extensions with KVM, for example. But we don't make any use
> >>> of other things like priorities, split deactivation/priority drop...
> >>
> >> Not that we could make use of priorities anymore as all interrupt handlers
> >> are now run with IRQs disabled; an IRQ handler can't be interrupted by a
> >> higher priority IRQ coming in.
> >>
> >> Part of the solution to that is to go back to the original philosophy of
> >> IRQ handling in Linux - do the least possible amount of work in the IRQ
> >> and move the heavier stuff off into soft-IRQ context.  Unfortunately,
> >> many drivers are no longer written like that, and just do a great amount
> >> of time consuming work in their IRQ handler.
> > 
> > We could also consider using interrupt priorities to have a fake NMI (I
> > think PPC does this for some cores), which is useful for profiling and
> > watchdogs, especially now that FIQ is often stolen by the secure world.
> > 
> > I remember dismissing this in the past because I thought it would increase
> > our GIC distributor accesses, but I don't remember why.
> 
> I think it would rather require to write to the interrupt priority mask
> register (GIC_PMR) in the CPU interface. The cost is probably the same,
> actually (probably quite high, given how often we enable/disable
> interrupts).

In terms of the hardware, maybe, but the distributor requires a lock and
will also trap to the hypervisor if accessed from a guest.

However, since the GIC_PMR is in the CPU interface then that should be fine.

Will