[PATCH 03/04] ARM: shmobile: r8a73a4 IRQC support
arnd at arndb.de
Thu Mar 14 09:43:04 EDT 2013
On Thursday 14 March 2013, Magnus Damm wrote:
> Hi Arnd,
> Thanks for your feedback, please see below for my reply.
> On Tue, Mar 12, 2013 at 9:31 PM, Arnd Bergmann <arnd at arndb.de> wrote:
> > On Tuesday 12 March 2013, Magnus Damm wrote:
> >> From: Magnus Damm <damm at opensource.se>
> >> Add IRQC interrupt controller support to r8a73a4 by
> >> hooking up two IRQC instances to handle 58 external
> >> IRQ signals. There IRQC controllers are tied to SPIs
> >> of the GIC. On r8a73a4 exact IRQ pin routing is handled
> >> by the PFC which is excluded from this patch.
> >> Both platform devices and DT devices are added in this
> >> patch. The platform device versions are used to provide
> >> a static interrupt map configuration for board code
> >> written in C.
> >> Signed-off-by: Magnus Damm <damm at opensource.se>
> > What is the status of the IRQC DT support? I remember that I wasn't
> > happy with a prior version, but I did not follow up on some of the
> > questions that came up, sorry about that.
> Uhm, perhaps I misunderstand, but I wonder if you refer to INTC instead of IRQC?
Yes, you are right.
> This particular driver is for the IRQC hardware block. It is not
> compatible with INTC. A while ago I posted an incremental DT support
> patch for IRQC - "[PATCH] irqchip: irqc: Add DT support", please see
Ok, I had missed that, but the driver certainly looks good to me.
> > Did the patches end up getting merged anyway, or should we resume the
> > discussion about those patches? I understand that lack of INTC bindings
> > would make new SoC support particularly hard, and I don't want to
> > be responsible for holding you up here.
> Thanks. I don't think the INTC patches went anywhere.
> To zoom out a bit let me list different interrupt controllers:
> A) INTC (drivers/sh/intc) [no DT yet]
> B) GIC (drivers/irqchip/irq-gic.c) [DT]
> C) INTC External IRQ Pin (drivers/irqchip/irq-renesas-intc-irqpin.c) [DT]
> D) IRQC (drivers/irqchip/irq-renesas-irqc.c) [DT]
> Simple use cases are:
> - Legacy SH SoCs or ARM SoCs with Cortex-A8 or older make use of A).
> - More recent ARM SoCs with Cortex-A9 or newer use B) and C) or B) and D).
Ok. And I guess the EMMA EV2 uses only GIC but not IRQC or INTC, right?
> On top of this we now and then have GPIO controllers that have
> built-in interrupt controllers.
Coming back to INTC, are you planning to use the same binding for A and C?
Which of them the binding you posted earlier for?
When I looked at the existing code, I had the impression that doing a
binding for just the SH-Mobile SoCs that have an ARM core in them
(including those that also have an SH core) would be much easier than
doing a binding that also covers the older SH SoCs, since those are
much less uniform.
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