[PATCH LINUX v5] xen: event channel arrays are xen_ulong_t and not unsigned long

[Will Deacon]

Hi guys,

On Mon, Mar 04, 2013 at 02:45:33AM +0000, Rob Herring wrote:
> On 02/20/2013 05:48 AM, Ian Campbell wrote:
> > On ARM we want these to be the same size on 32- and 64-bit.
> > 
> > This is an ABI change on ARM. X86 does not change.
> > 
> > Signed-off-by: Ian Campbell <ian.campbell at citrix.com>
> > Cc: Jan Beulich <JBeulich at suse.com>
> > Cc: Keir (Xen.org) <keir at xen.org>
> > Cc: Tim Deegan <tim at xen.org>
> > Cc: Stefano Stabellini <stefano.stabellini at eu.citrix.com>
> > Cc: linux-arm-kernel at lists.infradead.org
> > Cc: xen-devel at lists.xen.org
> > Cc: Konrad Rzeszutek Wilk <konrad.wilk at oracle.com>

[...]

> I'm seeing some some build failures on randconfig builds with this change:
> 
> /tmp/ccJaIZOW.s: Assembler messages:
> /tmp/ccJaIZOW.s:831: Error: even register required -- `ldrexd r5,r6,[r4]'
> 
> This is with ubuntu 12.04 cross compiler (gcc version 4.6.3
> (Ubuntu/Linaro 4.6.3-1ubuntu5)).
> 
> This register restriction is on ARM, but not Thumb builds. Comparing
> this to atomic64_cmpxchg, I don't see how to fix this. Perhaps Will or
> Nico have thoughts.

[...]

> > +	asm volatile("@ xchg_xen_ulong\n"
> > +		"1:     ldrexd  %0, %H0, [%3]\n"
> > +		"       strexd  %1, %2, %H2, [%3]\n"
> > +		"       teq     %1, #0\n"
> > +		"       bne     1b"
> > +		: "=&r" (oldval), "=&r" (tmp)
> > +		: "r" (val), "r" (ptr)
> > +		: "memory", "cc");

I also can't immediately see why GCC would allocate oldval to an odd base
register. Can you share your .config please?

Will