[PATCH 1/1] ARM: imx: clk-pllv3: change wait method for PLL lock
Peter Chen
peter.chen at freescale.com
Thu Jun 6 23:28:46 EDT 2013
On Thu, Jun 06, 2013 at 10:21:56AM +0100, Russell King - ARM Linux wrote:
> On Thu, Jun 06, 2013 at 02:55:26PM +0800, Peter Chen wrote:
> > @@ -62,9 +63,11 @@ static int clk_pllv3_prepare(struct clk_hw *hw)
> > writel_relaxed(val, pll->base);
> >
> > /* Wait for PLL to lock */
> > - while (!(readl_relaxed(pll->base) & BM_PLL_LOCK))
> > - if (time_after(jiffies, timeout))
> > + while (!(readl_relaxed(pll->base) & BM_PLL_LOCK)) {
> > + udelay(100);
> > + if (--count == 0)
> > return -ETIMEDOUT;
> > + }
>
> This is still buggy in the ways you describe above.
>
> do {
> if (readl_relaxed(pll->base) & BM_PLL_LOCK)
> break;
> udelay(100);
> } while (--count);
>
> if (count == 0 && !(readl_relaxed(pll->base) & BM_PLL_LOCK))
> return -ETIMEDOUT;
>
> Notice - we only return -ETIMEDOUT if the condition we're waiting for
> has not been satisfied _after_ the loop terminates, specifically, if
> this happens during the last 100us of our wait.
Thanks for your comments, it can make code be more reasonable.
>
> You can apply the same fix to your original; you don't need to move
> to using udelay() and a counter if you can tolerate some noise in
> the waiting time.
>
> The lesson here is: if you're waiting for any kind of an event, then
> be very careful how you code the failure path so you don't miss a
> success coincident with the timeout condition becoming true.
>
--
Best Regards,
Peter Chen
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