[RFC 5/5] usb: dwc3: enable async suspend/resume

Felipe Balbi balbi at ti.com
Wed Dec 18 11:06:11 EST 2013


On Wed, Dec 18, 2013 at 04:09:34PM +0530, Yuvaraj Kumar C D wrote:
> From: Andrew Bresticker <abrestic at chromium.org>
> 
> In addition to enabling async suspend/resume on the xhci-plat device,
> we must enable it for the dwc3 device (the parent of xhci-plat) in order
> to make the full USB stack resume asynchronously.  Like the xhci-plat,
> ehci-s5p, and ohci-exynos drivers, there are no outside dependencies
> which would make resuming the dwc3 driver asynchronously unsafe.
> 
> Signed-off-by: Andrew Bresticker <abrestic at chromium.org>
> Reviewed-by: Julius Werner <jwerner at chromium.org>
> Signed-off-by: Yuvaraj Kumar C D <yuvaraj.cd at samsung.com>
> ---
>  drivers/usb/dwc3/core.c |    2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
> index 59bb8d2..9c8a273 100644
> --- a/drivers/usb/dwc3/core.c
> +++ b/drivers/usb/dwc3/core.c
> @@ -586,6 +586,8 @@ static int dwc3_probe(struct platform_device *pdev)
>  
>  	pm_runtime_allow(dev);
>  
> +	device_enable_async_suspend(dev);

how has this series been tested ? Let me rephrase this: was this series
tested at all ? Note that if we are in gadget mode, we will disable
physical endpoints 0 and 1, which will break USB communication requiring
a new enumeration later. On top of that, for versions of the core which
are configured without hibernation support - in fact for all cores
currently, since we don't have hibernation support implemented in this
driver -, we will loose communication with the far end (be it a host or
a device).

You mention there are no external dependencies to make async suspend
work on this driver, but that's far from the truth. As it is today, this
driver needs a lot of work to learn about all the details about all
different versions of this IP when it comes to supporting async PM.

I suppose this was tested with 500 other out-of-tree patches and you
simply cherry-picked this patch to send upstream ? Am I right ? It
certainly looks like it.

Please let us know how has this been tested ? Did you run USB30CV ? Did
you make sure to run through USB Certification interoperability tests ?

Did you leave some stress test running for weeks before sending this
patch out ? Is Exynos 5 working fine out of mainline ?

cheers

-- 
balbi
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