On Friday, December 13, 2013 at 02:49:12 AM, Troy Kisky wrote: > Set the data delays to min, and clock delays to max > because the traces are equal length on pcb. > > Signed-off-by: Troy Kisky <troy.kisky at boundarydevices.com> Reviewed-by: Marek Vasut <marex at denx.de> Best regards, Marek Vasut