[PATCH 02/12] SPEAr13xx: Move SPEAr1340 definitions to header file
Mohit KUMAR DCG
Mohit.KUMAR at st.com
Thu Dec 12 23:18:35 EST 2013
Hello Arnd,
> -----Original Message-----
> From: Arnd Bergmann [mailto:arnd at arndb.de]
> Sent: Thursday, December 12, 2013 4:18 AM
> To: linux-arm-kernel at lists.infradead.org
> Cc: Mohit KUMAR DCG; linux-pci at vger.kernel.org; Pratyush ANAND; spear-
> devel; Viresh Kumar
> Subject: Re: [PATCH 02/12] SPEAr13xx: Move SPEAr1340 definitions to
> header file
>
> On Wednesday 11 December 2013, Mohit Kumar wrote:
> > From: Pratyush Anand <pratyush.anand at st.com>
> >
> > Move SPEAr1340 definitions to header files so that theese can be used
> > by other code too.
>
> This looks like a regression, we intentionally made them private and they
> should be moved into a proper driver instead of being globally visible.
>
> > diff --git a/arch/arm/mach-spear/include/mach/spear.h
> > b/arch/arm/mach-spear/include/mach/spear.h
> > index 5cdc53d..4526f75 100644
> > --- a/arch/arm/mach-spear/include/mach/spear.h
> > +++ b/arch/arm/mach-spear/include/mach/spear.h
> > @@ -86,6 +86,61 @@
> > /* Debug uart for linux, will be used for debug and uncompress messages
> */
> > #define SPEAR_DBG_UART_BASE UART_BASE
> >
> > +/* PCIe/SATA Base addresses */
> > +#define SPEAR1340_SATA_BASE UL(0xB1000000)
> > +#define SPEAR1340_PCIE_BASE UL(0xB1000000)
>
> These should be in DT only.
>
> > +/* Power Management Registers */
> > +#define SPEAR1340_PCM_CFG (VA_MISC_BASE +
> 0x100)
> > +#define SPEAR1340_PCM_WKUP_CFG
> (VA_MISC_BASE + 0x104)
> > +#define SPEAR1340_SWITCH_CTR (VA_MISC_BASE +
> 0x108)
> > +
> > +#define SPEAR1340_PERIP1_SW_RST
> (VA_MISC_BASE + 0x318)
> > +#define SPEAR1340_PERIP2_SW_RST
> (VA_MISC_BASE + 0x31C)
> > +#define SPEAR1340_PERIP3_SW_RST
> (VA_MISC_BASE + 0x320)
>
> The RST bits should probably go into a drivers/reset driver. Not sure what the
> other registers do, but I'm sure we can find a driver for these too, possibly
> they should be part of the PHY driver?
- Perhaps if we implement phy and reset driver then we may not require to move these definitions and
it will address most of your comments on SPEar13xx pcie driver. I am understanding and working on this.l
Regards
Mohit
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