[PATCH RFC] PCI: imx6: remove outbound io/mem ATU region mapping

[Richard Zhu]

Hi Marek:

> -----Original Message-----
> From: linux-pci-owner at vger.kernel.org [mailto:linux-pci-owner at vger.kernel.org]
> On Behalf Of Marek Vasut
> Sent: Tuesday, December 03, 2013 5:20 PM
> To: Zhu Richard-R65037
> Cc: Jingoo Han; 'Pratyush Anand'; 'Mohit KUMAR DCG'; 'Tim Harvey'; 'Kishon
> Vijay Abraham I'; linux-pci at vger.kernel.org; linux-arm-
> kernel at lists.infradead.org; 'Bjorn Helgaas'; 'Frank Li'; 'Sascha Hauer'; 'Sean
> Cross'; 'Shawn Guo'; 'Siva Reddy Kallam'; 'Srikanth T Shivanand'; 'Troy Kisky';
> 'Yinghai Lu'
> Subject: Re: [PATCH RFC] PCI: imx6: remove outbound io/mem ATU region mapping
> 
> Dear Richard Zhu,
> 
> > Hi Marek:
> > > -----Original Message-----
> > > From: Marek Vasut [mailto:marex at denx.de]
> > > Sent: Friday, November 29, 2013 10:21 AM
> > > To: Jingoo Han
> > > Cc: 'Pratyush Anand'; 'Mohit KUMAR DCG'; 'Tim Harvey'; 'Kishon Vijay
> > > Abraham I'; linux-pci at vger.kernel.org;
> > > linux-arm-kernel at lists.infradead.org; 'Bjorn Helgaas'; 'Frank Li';
> > > Zhu Richard-R65037; 'Sascha Hauer'; 'Sean Cross'; 'Shawn Guo'; 'Siva
> > > Reddy Kallam'; 'Srikanth T Shivanand'; 'Troy Kisky'; 'Yinghai Lu' Subject:
> Re:
> > > [PATCH RFC] PCI: imx6: remove outbound io/mem ATU region mapping
> > >
> > > Dear Jingoo Han,
> > >
> > > > On Wednesday, November 27, 2013 5:37 PM, Pratyush Anand wrote:
> > > > > On Wed, Nov 27, 2013 at 04:24:47PM +0800, Marek Vasut wrote:
> > > > > > > On Wed, Nov 27, 2013 at 04:46:09AM +0800, Marek Vasut wrote:
> > > > > > > > Dear Pratyush Anand,
> > > > > > > >
> > > > > > > > > Hi,
> > > > > > > > >
> > > > > > > > > On Wed, Oct 23, 2013 at 12:55:43PM +0800, Tim Harvey wrote:
> > > > > > > > > > The IMX6 iATU is used for address translation between
> > > > > > > > > > the AXI bus address space and PCI address space.  This
> > > > > > > > > > is used for
> > > > > > > > > > type0 and type1 config cycles but is not necessary for
> > > > > > > > > > outbound io/mem regions.
> > > > > > > > > >
> > > > > > > > > > This patch removes the calls that inappropriately
> > > > > > > > > > re-configures the ATU viewport for outbound memory and
> > > > > > > > > > IO after config cycles and removes them altogether as
> > > > > > > > > > they are not
> > >
> > > necessary.
> > >
> > > > > > > > > > This resolves issues with PCI devices behind switches
> > > > > > > > > > and has been tested with a Gige device behind a PLX
> > > > > > > > > > PEX860x switch. More testing is needed for other
> configurations.
> > > > > > > > >
> > > > > > > > > It seems to me that in your controller you have only one
> > > > > > > > > view port. Also mem_base and mem_bus_addr is same. Thats
> > > > > > > > > why it works in your case.
> > > > > > > >
> > > > > > > > MX6 has 4 In/4 Out viewports AFAICT.
> > > > > > >
> > > > > > > Then if I do not miss anything, MX6 should work even without
> > > > > > > this patch.
> > > > > >
> > > > > > Yes, yet, it does not. On the other hand, this defect is only
> > > > > > problematic if you use the devices behind a switch. Do you use
> > > > > > a PCIe switch on your platform please?
> > > > >
> > > > > I had tested with device under bridge.
> > > > > Mohit is in process of validating SPEAr patches with latest kernel.
> > > > > Mohit, see if we can arrange a switch and test, once SPEAr
> > > > > platform is ready with latest kernel.
> > > >
> > > > I agree with Pratyush Anand's opinion.
> > > > One of our engineers had tested PCI cards under switch.
> > > > As far as I know, there was no issue about this.
> > > > However, currently, I don't have any switches. So, I Cannot test
> > > > this on Exynos platform.
> > >
> > > OK, I will wait for Richard to come up with confirmation if possible.
> > > Looks like he's out of the office, so it might take a bit.
> >
> > [Richard] One Pericom PI7C9X2G303EL pcie switch, and two pcie ep
> > deivces(one is intel e1000e nic, the other is one xhci device) are
> > tested on imx6q sabresd board.
> 
> How/what does have such pericom switch and can be attached to an MX6 sabresdp ?
> Where can I get it?
[Richard] You can apply the example from Pericom.
> 
> > Without removing outbound io/mem regions view map during the cfg0/1
> > read/write cycle, both of these devices can't work well at my side.
> > Works well after remove them during the cfg0/1 read/write cycles.
> 
> Understood. Given that the iATU programming works on other CPUs (confirmed on
> st spear and ti dra7xx), we might have some issues with the iATU on MX6 . Is
> there anything special about the iATU on the MX6 ?
[Richard] As I know that there is no anything special about the iATU on MX6.
Let me to make a double check with IC team later.
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Best Regards
Richard Zhu