[PATCH 1/3] misc: Add crossbar driver

[Linus Walleij]

On Thu, Aug 15, 2013 at 11:14 PM, Santosh Shilimkar
<santosh.shilimkar at ti.com> wrote:
> On Thursday 15 August 2013 04:51 PM, Linus Walleij wrote:
(...)
>> Sorry I don't understand what thread that is... can you point me there?
>> My previous statement on this issue what this:
>> http://marc.info/?l=linux-kernel&m=137442541628641&w=2
(...)
>>> I don't see how you can make this happen with an irqchip
>>> infrastructure.
>>
>> I think my post above describes this.
>>
> Sorry for being dumb but I don't think cascaded irqchip examples
> like GPIO and cross-bars are same. If you take an example of
> GPIO irqchip, it always have a physical connection even if it
> is 1 IRQ line for (32 logical/sparse IRQs). That goes with
> other MFD examples too.
>
> So may be I am still missing something in your proposal.

Why does it matter if it is a GPIO or MFD or whatever?
The point is that the IRQ line passes thru something else,
and this we model as an irqdomain.

Anyway here is a silicon cascaded IRQ chip:
arch/arm/mach-versatile/core.c
See versatile_init_irq():

__vic_init(VA_VIC_BASE, IRQ_VIC_START, ~0, 0, np);
(...)
fpga_irq_init(VA_SIC_BASE, "SIC", IRQ_SIC_START,
                IRQ_VICSOURCE31, PIC_VALID, np);

The VIC in the versatile has the SIC cascaded from one of
its IRQ lines. Both the VIC and SIC (fpga IRQ) are
using irqdomains so the SIC spawns a child irqdomain
from IRQ 31 (last IRQ) of the VIC.

The difference with a crossbar is that it can software-config
which IRQ goes where, and does not have a callback
to clear interrupts or anything like that, it just passes them
thru. But it is best modeled as an irqdomain IMO.

Yours,
Linus Walleij