Removal of NWFPE in its entirety, and VFP emulation code

[Måns Rullgård]

Russell King - ARM Linux <linux at arm.linux.org.uk> writes:

>> > Subarchitecture, bits [22:16]
>> > 0b0000011
>> > VFP architecture v3 or later with Null subarchitecture. The entire floating-point
>> > implementation is in hardware, and no software support code is required. The
>> > VFP architecture version is indicated by the MVFR0 and MVFR1 registers.
>> > This value can be used only by an implementation that does not support the trap
>> > enable bits in the FPSCR, see Floating-point Status and Control Register
>> > (FPSCR) on page A2-28.
>> 
>> This means merely that the implementation never traps on things like
>> denormal inputs or over/underflow.  It has nothing to do with vector
>> support.
>
> Wrong.  The VFP subarchitecture defines the interface between *VFP
> hardware* and the *VFP support code*.  I suggest you read carefully the
> chapter in the ARM ARM *before* you make any further comment, and make
> yourself look any more a fool than you already do.

Yet the A9 clearly does trap, just like the TRM says it should.  So
which is more likely, that the TRM and silicon are both wrong, or that
you are wrong?  Perhaps we should put it to a vote.

-- 
Måns Rullgård
mans at mansr.com