[PATCH V5 3/6] arm: cache-l2x0: add support for Aurora L2 cache ctrl

[Catalin Marinas]

On 26 September 2012 17:02, Gregory CLEMENT
<gregory.clement at free-electrons.com> wrote:
> +static void aurora_pa_range(unsigned long start, unsigned long end,
> +                       unsigned long offset)
> +{
> +       unsigned long flags;
> +
> +       raw_spin_lock_irqsave(&l2x0_lock, flags);
> +       writel(start, l2x0_base + AURORA_RANGE_BASE_ADDR_REG);
> +       writel(end, l2x0_base + offset);

Just use writel_relaxed() here for consistency and possible deadlock avoidance.

-- 
Catalin