[PATCH v3 RESEND 14/17] ARM: LPAE: accomodate >32-bit addresses for page table base
catalin.marinas at arm.com
Mon Sep 24 11:17:26 EDT 2012
On Fri, Sep 21, 2012 at 04:56:12PM +0100, Cyril Chemparathy wrote:
> This patch redefines the early boot time use of the R4 register to steal a few
> low order bits (ARCH_PGD_SHIFT bits) on LPAE systems. This allows for up to
> 38-bit physical addresses.
That's fine. We figured out that on the vexpress with A15 and sparsemem
enabled could only use 36-bit because of section number stored in the
top bits of page->flags.
An alternative to this patch could be to always patch in the upper
32-bit of phys_offset like you do in virt_to_phys(). We know that pgd is
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