[PATCH v4 2/9] pinctrl: single: support gpio request and free
tony at atomide.com
Tue Nov 13 12:34:04 EST 2012
* Linus Walleij <linus.walleij at linaro.org> [121113 05:09]:
> On Wed, Nov 7, 2012 at 11:27 PM, Tony Lindgren <tony at atomide.com> wrote:
> > * Haojian Zhuang <haojian.zhuang at gmail.com> [121107 07:21]:
> >> Marvell's PXA/MMP silicon also match the behavior of pinctrl-single.
> >> Each pin binds to one register. A lot of pins could be configured
> >> as gpio.
> >> Now add these properties in below.
> >> <gpio range phandle>:
> >> include "pinctrl-single,gpio" & "pinctrl,gpio-func" properties.
> >> pinctrl-single,gpio: <gpio base, npins in range, register offset>
> >> pinctrl-single,gpio-func: <gpio function value in mux>
> >> pinctrl-single,gpio-ranges: phandle list of gpio range array
> > This one looks OK to me now:
> > Acked-by: Tony Lindgren <tony at atomide.com>
> - Will this patch in isolation apply to my pinctrl tree?
> - In that case, do you want me to apply it?
> Acked-by: Linus Walleij <linus.walleij at linaro.org>
I guess the best way to go is if Linus applies this and
the debugfs fix one into some immutable pinctrl branch that
various SoC branches can pull in as needed.
The generic pinconf patch still needs few updates.
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