[RFC PATCH 4/4] ARM: gic: use a private mapping for CPU target interfaces
Nicolas Pitre
nicolas.pitre at linaro.org
Wed Nov 7 10:11:00 EST 2012
On Wed, 7 Nov 2012, Will Deacon wrote:
> On Tue, Nov 06, 2012 at 10:59:35PM +0000, Nicolas Pitre wrote:
> > On Tue, 6 Nov 2012, Will Deacon wrote:
> > > > /*
> > > > + * Get what the GIC says our CPU mask is.
> > > > + */
> > > > + BUG_ON(cpu >= 8);
> > > > + cpu_mask = readl_relaxed(dist_base + GIC_DIST_TARGET + 0);
> > >
> > > Making the mask a u8 and using readb_relaxed here makes this bit of code
> > > clearer to me (and the GIC apparently allows such an access to this
> > > register).
> >
> > Not always. At least RTSM throws an exception if you do so.
> > Been there.
>
> That would be a bug in the RTSM then. Have you reported it to support? (if
> not, I can chase this one up). I'd rather we just fix the model than work
> around it in Linux.
I have no problem with you chasing it down with the support people.
I don't want to wait for fixed RTSM versions to be released and the
whole world to migrate to them though.
While the readl is maybe marginally unintuitive compared to a readb
here, the code is always using readl everywhere else already, even using
bit masking and shifting when a readb/writeb could have made the code
much simpler (see gic_set_affinity() for example). I therefore much
prefer to stick to a proven 32-bit access than risking regression on
some possible implementation where the 8-bit access wasn't properly
implemented as the doc says it should and never exercised before.
In other words, I prefer erring on the safe side here.
Nicolas
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