Query about: ARM11 MPCore: preemption/task migration cache coherency

[Catalin Marinas]

On Thu, May 31, 2012 at 04:11:46AM +0100, bill4carson wrote:
> On 2012年05月31日 11:00, Catalin Marinas wrote:
> > AFAIK, The SCU only snoops the D-cache, not the I-cache. We have a full
> > I-cache invalidation during task migration.
> 
>                              ^^^^^^^^^^^^
> Could you please point it to me?

There is a check in switch_mm() in the asm/mmu_context.h file.

-- 
Catalin