[PATCH V3 04/10] ARM: OMAP3: hwmod: rename the smartreflex entries
Kevin Hilman
khilman at ti.com
Mon May 7 19:39:53 EDT 2012
"J, KEERTHY" <j-keerthy at ti.com> writes:
> Hi AnilKumar,
>
> Thanks for reviewing.
>
> On Fri, May 4, 2012 at 2:00 PM, AnilKumar, Chimata <anilkumar at ti.com> wrote:
>> On Thu, Apr 26, 2012 at 23:10:35, J, KEERTHY wrote:
>>> From: Jean Pihet <j-pihet at ti.com>
>>>
>>> Change the name field value to better reflect the smartreflex
>>> integration in the system.
>>>
>>> Signed-off-by: Jean Pihet <j-pihet at ti.com>
>>> Signed-off-by: J Keerthy <j-keerthy at ti.com>
>>> ---
>>> arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 8 ++++----
>>> arch/arm/mach-omap2/smartreflex.c | 2 +-
>>> 2 files changed, 5 insertions(+), 5 deletions(-)
>>>
>>> diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
>>> index 144d118..15907b0 100644
>>> --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
>>> +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
>>> @@ -1324,7 +1324,7 @@ static struct omap_hwmod_irq_info omap3_smartreflex_mpu_irqs[] = {
>>> };
>>>
>>> static struct omap_hwmod omap34xx_sr1_hwmod = {
>>> - .name = "sr1",
>>> + .name = "smartreflex_mpu_iva",
>>> .class = &omap34xx_smartreflex_hwmod_class,
>>> .main_clk = "sr1_fck",
>>> .prcm = {
>>> @@ -1342,7 +1342,7 @@ static struct omap_hwmod omap34xx_sr1_hwmod = {
>>> };
>>>
>>> static struct omap_hwmod omap36xx_sr1_hwmod = {
>>> - .name = "sr1",
>>> + .name = "smartreflex_mpu_iva",
>>> .class = &omap36xx_smartreflex_hwmod_class,
>>> .main_clk = "sr1_fck",
>>> .prcm = {
>>> @@ -1369,7 +1369,7 @@ static struct omap_hwmod_irq_info omap3_smartreflex_core_irqs[] = {
>>> };
>>>
>>> static struct omap_hwmod omap34xx_sr2_hwmod = {
>>> - .name = "sr2",
>>> + .name = "smartreflex_core",
>>> .class = &omap34xx_smartreflex_hwmod_class,
>>> .main_clk = "sr2_fck",
>>> .prcm = {
>>> @@ -1387,7 +1387,7 @@ static struct omap_hwmod omap34xx_sr2_hwmod = {
>>> };
>>>
>>> static struct omap_hwmod omap36xx_sr2_hwmod = {
>>> - .name = "sr2",
>>> + .name = "smartreflex_core",
>>> .class = &omap36xx_smartreflex_hwmod_class,
>>> .main_clk = "sr2_fck",
>>> .prcm = {
>>> diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c
>>> index 2edd1e2..d859277 100644
>>> --- a/arch/arm/mach-omap2/smartreflex.c
>>> +++ b/arch/arm/mach-omap2/smartreflex.c
>>> @@ -183,7 +183,7 @@ static void sr_set_regfields(struct omap_sr *sr)
>>> sr->err_weight = OMAP3430_SR_ERRWEIGHT;
>>> sr->err_maxlimit = OMAP3430_SR_ERRMAXLIMIT;
>>> sr->accum_data = OMAP3430_SR_ACCUMDATA;
>>> - if (!(strcmp(sr->name, "sr1"))) {
>>> + if (!(strcmp(sr->name, "smartreflex_mpu_iva"))) {
>>
>> What if voltage rail is different for mpu and iva? I have seen some devices
>> supports SmartReflex have different voltage rails for mpu and iva.
>>
>
> I get the point. OMAP3 iva and mpu have a common rail. OMAP4 onwards
> even we have different rails for mpu and iva. I will enhance the checks here.
Rather than enhancing the checks, this SoC specific data should probably
just be made part of the SoC specific hwmod dev_attr.
Kevin
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