[PATCH] ARM: Enable I$/D$/BrPredict based on config
Buckley, Bryan
bryan.buckley at ti.com
Thu May 3 18:58:58 EDT 2012
On Thu, May 3, 2012 at 5:57 PM, Måns Rullgård <mans at mansr.com> wrote:
> "Buckley, Bryan" <bryan.buckley at ti.com> writes:
>
>> On Thu, May 3, 2012 at 5:23 PM, Måns Rullgård <mans at mansr.com> wrote:
>>>
>>> Bryan Buckley <bryan.buckley at ti.com> writes:
>>>
>>> > Currently we only disable these bits based on config. Now we will
>>> > use this config option to explicitly enable these features at this
>>> > point regardless of what bootloader, other SW, or HW did before.
>>> >
>>> > Signed-off-by: Bryan Buckley <bryan.buckley at ti.com>
>>> > ---
>>> > arch/arm/kernel/head.S | 6 ++++++
>>> > 1 files changed, 6 insertions(+), 0 deletions(-)
>>> >
>>> > diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
>>> > index 3bf0c7f..cec0de5 100644
>>> > --- a/arch/arm/kernel/head.S
>>> > +++ b/arch/arm/kernel/head.S
>>> > @@ -411,12 +411,18 @@ __enable_mmu:
>>> > #endif
>>> > #ifdef CONFIG_CPU_DCACHE_DISABLE
>>> > bic r0, r0, #CR_C
>>> > +#else
>>> > + orr r0, r0, #CR_C
>>> > #endif
>>> > #ifdef CONFIG_CPU_BPREDICT_DISABLE
>>> > bic r0, r0, #CR_Z
>>> > +#else
>>> > + orr r0, r0, #CR_Z
>>> > #endif
>>> > #ifdef CONFIG_CPU_ICACHE_DISABLE
>>> > bic r0, r0, #CR_I
>>> > +#else
>>> > + orr r0, r0, #CR_I
>>> > #endif
>>> > #ifdef CONFIG_ARM_LPAE
>>> > mov r5, #0
>>> > --
>>>
>>> Caches and branch predictors may require implementation defined
>>> invalidation before being enabled.
>>
>> True.. I was relying on going through arch/arm/boot/compressed/head.S
>> to do that for me. Was that unreasonable?
>
> I'd be inclined to qualify that as "other SW." It is possible to start
> the kernel without using that code, even if it is not typically done.
>
haha, yeah me too.
Thanks Måns and Russel.
> --
> Måns Rullgård
> mans at mansr.com
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