[PATCH] ARM: OMAP3: Fix CM register bit masks

Paul Walmsley paul at pwsan.com
Wed May 2 03:33:57 EDT 2012


On Fri, 27 Apr 2012, Rajendra Nayak wrote:

> The register bits for MPU_CLK_SRC and IVA2_CLK_SRC
> in CM_CLKSEL1_PLL register are 3 bits wide.
> Fix the MASK definition accordingly.
> 
> Signed-off-by: Rajendra Nayak <rnayak at ti.com>

Thanks, queued for 3.5.

- Paul



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