[PATCH v5 2/2] DMAEngine: Add DMAEngine driver based on old MSM ADM DMA APIs

Linus Walleij linus.walleij at linaro.org
Mon Mar 26 03:17:55 EDT 2012


On Thu, Mar 22, 2012 at 3:23 PM, Ravi Kumar V <kumarrav at codeaurora.org> wrote:

This stuff:

> +enum adm_flush_type {
> +       ADM_FORCED_FLUSH,
> +       ADM_GRACEFUL_FLUSH,
> +};

> +/*
> + *  Controlling the hardware channel like stopping, flushing.
> + */
> +static int msm_dma_chan_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
> +                                                       unsigned long arg)
> +{
> +       enum adm_flush_type cmd_type = arg;
> +
> +       if (cmd == DMA_TERMINATE_ALL) {
> +               switch (cmd_type) {
> +               case ADM_GRACEFUL_FLUSH:
> +                               msm_dmov_stop_cmd(chan->chan_id, NULL, 1);
> +                       break;
> +               case ADM_FORCED_FLUSH:
> +                       /*
> +                        * We treate default as forced flush
> +                        * so we fall through
> +                        */
> +               default:
> +                               msm_dmov_stop_cmd(chan->chan_id, NULL, 0);
> +                       break;
> +               }
> +       }
> +       return 0;
> +}

This is an interesting way of using the opaque arg. Can you describe
the different semantics of graceful vs forced flush so we understand
the usecases for them?

DMA_TERMINATE_ALL is usually not very graceful.

DMA_PAUSE might be the semantic you're looking for as the
graceful path, and then you can do away with this strange
enum altogether.

Yours,
Linus Walleij



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