[PATCH] GPMC: add ECC control definitions
Yegor Yefremov
yegor_sub1 at visionsystems.de
Thu Mar 8 06:10:31 EST 2012
Am 06.03.2012 00:03, schrieb Tony Lindgren:
> * Yegor Yefremov <yegor_sub1 at visionsystems.de> [120123 03:33]:
>> Signed-off-by: Yegor Yefremov <yegorslists at googlemail.com>
>> ---
>> arch/arm/mach-omap2/gpmc.c | 30 +++++++++++++++++++++++++-----
>> 1 file changed, 25 insertions(+), 5 deletions(-)
>>
>> Index: b/arch/arm/mach-omap2/gpmc.c
>> ===================================================================
>> --- a/arch/arm/mach-omap2/gpmc.c
>> +++ b/arch/arm/mach-omap2/gpmc.c
>> @@ -50,6 +50,19 @@
>> #define GPMC_ECC_SIZE_CONFIG 0x1fc
>> #define GPMC_ECC1_RESULT 0x200
>>
>> +/* GPMC ECC control settings */
>> +#define GPMC_ECC_CTRL_ECCCLEAR 0x100
>> +#define GPMC_ECC_CTRL_ECCDISABLE 0x000
>> +#define GPMC_ECC_CTRL_ECCREG1 0x001
>> +#define GPMC_ECC_CTRL_ECCREG2 0x002
>> +#define GPMC_ECC_CTRL_ECCREG3 0x003
>> +#define GPMC_ECC_CTRL_ECCREG4 0x004
>> +#define GPMC_ECC_CTRL_ECCREG5 0x005
>> +#define GPMC_ECC_CTRL_ECCREG6 0x006
>> +#define GPMC_ECC_CTRL_ECCREG7 0x007
>> +#define GPMC_ECC_CTRL_ECCREG8 0x008
>> +#define GPMC_ECC_CTRL_ECCREG9 0x009
>> +
>> #define GPMC_CS0_OFFSET 0x60
>> #define GPMC_CS_SIZE 0x30
>>
>> @@ -855,8 +868,9 @@
>> gpmc_ecc_used = cs;
>>
>> /* clear ecc and enable bits */
>> - val = ((0x00000001<<8) | 0x00000001);
>> - gpmc_write_reg(GPMC_ECC_CONTROL, val);
>> + gpmc_write_reg(GPMC_ECC_CONTROL,
>> + GPMC_ECC_CTRL_ECCCLEAR |
>> + GPMC_ECC_CTRL_ECCREG1);
>>
>> /* program ecc and result sizes */
>> val = ((((ecc_size >> 1) - 1) << 22) | (0x0000000F));
>> @@ -864,13 +878,19 @@
>>
>> switch (mode) {
>> case GPMC_ECC_READ:
>> - gpmc_write_reg(GPMC_ECC_CONTROL, 0x101);
>> + gpmc_write_reg(GPMC_ECC_CONTROL,
>> + GPMC_ECC_CTRL_ECCCLEAR |
>> + GPMC_ECC_CTRL_ECCREG1);
>> break;
>> case GPMC_ECC_READSYN:
>> - gpmc_write_reg(GPMC_ECC_CONTROL, 0x100);
>> + gpmc_write_reg(GPMC_ECC_CONTROL,
>> + GPMC_ECC_CTRL_ECCCLEAR |
>> + GPMC_ECC_CTRL_ECCDISABLE);
>> break;
>> case GPMC_ECC_WRITE:
>> - gpmc_write_reg(GPMC_ECC_CONTROL, 0x101);
>> + gpmc_write_reg(GPMC_ECC_CONTROL,
>> + GPMC_ECC_CTRL_ECCCLEAR |
>> + GPMC_ECC_CTRL_ECCREG1);
>> break;
>> default:
>> printk(KERN_INFO "Error: Unrecognized Mode[%d]!\n", mode);
>>
> No functional changes here, right?
>
> Can GPMC_ECC_READ and GPMC_ECC_WRITE case be combined:
>
> switch (mode) {
> case GPMC_ECC_READ:
> case GPMC_ECC_WRITE:
> gpmc_write_reg(GPMC_ECC_CONTROL,
> GPMC_ECC_CTRL_ECCCLEAR |
> GPMC_ECC_CTRL_ECCREG1);
> break;
> ...
You are right. path v2 already sent.
Thanks for review.
Best regards,
Yegor
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