[PATCH 16/16] ARM: imx: enable SPARSE_IRQ for imx platform
shawn.guo at linaro.org
Thu Jun 14 03:55:30 EDT 2012
On Thu, Jun 14, 2012 at 03:40:09PM +0800, Haojian Zhuang wrote:
> On Thu, Jun 14, 2012 at 1:59 PM, Shawn Guo <shawn.guo at linaro.org> wrote:
> > As all irqchips on imx have been changed to allocate their irq_descs,
> > and all unneeded mach/irqs.h inclusions on imx have been cleaned up,
> > now it's time to select SPARSE_IRQ for imx/mxc.
> > The SPARSE_IRQ support forces irqs allocation starting from 16. All
> > those static irq number definition for SoCs need to shift 16 to keep
> > non-DT boot works.
> Do we really need to shift 16 to keep non-DT boot works?
Yes, for my case.
> I think that we can allocate "new irq numbers - NR_IRQS_LEGACY" in interrupt
> controller in DT mode.
In DT mode, I need to do nothing about it, because with irqdomain
support, DT core will translate the hardware irq number encoded in
device tree to Linux irq. That said, platform_get_irq will
automatically return me Linux irq number.
> And we needn't shift NR_IRQS_LEGACY in non-DT mode,
> since irq numbers are already specified in .nr_irqs of machine description.
I took a different (IMO, cleaner) approach than setting .nr_irqs in
mach_desc. With all irqdescs dynamically allocated, I do not need
to set .nr_irqs to have irq core preallocate all these irqs. IMO,
that's the point of SPARSE_IRQ. To me, the .nr_irqs approach is just a
quick and dirty path to SPARSE_IRQ, but we gain nothing from that
except getting rid of platform NR_IRQS definition.
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