[PATCH 1/2] ARM: vmlinux.lds.S: do not hardcode cacheline size as 32 bytes

Stephen Boyd sboyd at codeaurora.org
Mon Jan 16 13:30:23 EST 2012

On 01/16/12 10:26, Will Deacon wrote:
> On Mon, Jan 16, 2012 at 06:22:34PM +0000, Stephen Boyd wrote:
>> What do you think about aligning the exception fixup table to the same
>> value?
> Hmm, I'm not sure I see what that gains us over the current 32-byte
> alignment. Are you seeing any measurable performance difference with it being
> cacheline-aligned?

I haven't measured anything yet. I just see that it's another value
hard-coded to 32 in the linker script and that tile has decided to use
L1_CACHE_BYTES for it.

Sent by an employee of the Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.

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