[PATCH V6 1/5] ARM: exynos: Add support AFTR mode on EXYNOS4210

[Kukjin Kim]

Tushar Behera wrote:
> 
> Hi Amit,
> 
> On 02/21/2012 11:49 AM, Amit Daniel Kachhap wrote:
> > This patch adds support AFTR(ARM OFF TOP RUNNING) mode in
> > cpuidle driver. L2 cache keeps their data in this mode.
> > This patch ports the code to the latest interfaces to
> > save/restore CPU state inclusive of CPU PM notifiers, l2
> > resume and cpu_suspend/resume.
> >
> > Signed-off-by: Jaecheol Lee <jc.lee at samsung.com>
> > Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi at arm.com>
> > Signed-off-by: Amit Daniel Kachhap <amit.kachhap at linaro.org>
> > ---
> >  arch/arm/mach-exynos/cpuidle.c          |  147
> ++++++++++++++++++++++++++++++-
> >  arch/arm/mach-exynos/include/mach/pmu.h |    2 +
> >  2 files changed, 146 insertions(+), 3 deletions(-)
> >
> > diff --git a/arch/arm/mach-exynos/cpuidle.c b/arch/arm/mach-
> exynos/cpuidle.c
> 
> [ snip ]
> 
> > +static int exynos4_enter_core0_aftr(struct cpuidle_device *dev,
> > +				struct cpuidle_driver *drv,
> > +				int index)
> > +{
> 
> [ snip ]
> 
> > +	scu_enable(S5P_VA_SCU);
> 
> #ifdef CONFIG_SMP
> 	scu_enable(S5P_VA_SCU);
> #endif
> 
> Without this, if SMP is not enabled, I am getting following build error.
> 
> arch/arm/mach-exynos/built-in.o: In function `exynos4_enter_core0_aftr':
> arch/arm/mach-exynos/cpuidle.c:131: undefined reference to `scu_enable'
> 
Thanks for your pointing out.

Let me fix it as per your comment when I apply this patch.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim <kgene.kim at samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.