oprofile and ARM A9 hardware counter

stephane eranian eranian at googlemail.com
Tue Feb 7 06:25:28 EST 2012


On Tue, Feb 7, 2012 at 12:09 PM, Shilimkar, Santosh
<santosh.shilimkar at ti.com> wrote:
> On Tue, Feb 7, 2012 at 4:23 PM, Shilimkar, Santosh
> <santosh.shilimkar at ti.com> wrote:
>> ( Removing dead "linux-arm-kernel at lists.arm.linux.org.uk" and adding
>> correct list
>>
>> On Tue, Feb 7, 2012 at 4:07 PM, stephane eranian <eranian at googlemail.com> wrote:
>>> Hi,
>>>
>>> Ok, with Santosh's patch this is much better almost as expected, still
>>> 10-15% off.
>>>
> [....]
>
>>> So the fix does help. I am wondering why we're not getting closer to
>>> 10k samples. But that
>>> may be due to some overhead somewhere in there.
>>>
>
> There might be still a small corner case where few reads
> might return the stale value. Counter need at least 1 32K
> clock cycle for the sync. udelay is not accurate but
> it will at least give min. 1/32768, so it should be
> fine.
>
> May be you can try out below patch and see if it helps.
>
> Regards
> Santosh
>
> diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c
> index 5f0f229..014d8bd 100644
> --- a/arch/arm/plat-omap/counter_32k.c
> +++ b/arch/arm/plat-omap/counter_32k.c
> @@ -18,6 +18,7 @@
>  #include <linux/err.h>
>  #include <linux/io.h>
>  #include <linux/clocksource.h>
> +#include <linux/delay.h>
>
>  #include <asm/sched_clock.h>
>
> @@ -38,6 +39,8 @@ static void __iomem *timer_32k_base;
>
>  static u32 notrace omap_32k_read_sched_clock(void)
>  {
> +       /* Counter might take 1 clock cycle for OCP sync */
> +       udelay(31);
>        return timer_32k_base ? __raw_readl(timer_32k_base) : 0;
>  }
That's worse with this patch (on top of the previous one).

84087402343 0x4a400 [0x28]: PERF_RECORD_SAMPLE(IP, 2): 3774/3774:
0x87b4 period: 989489 addr: 0
84088409423 0x4a428 [0x28]: PERF_RECORD_SAMPLE(IP, 2): 3774/3774:
0x87b4 period: 991744 addr: 0
84089355468 0x4a450 [0x28]: PERF_RECORD_SAMPLE(IP, 2): 3774/3774:
0x87b4 period: 971936 addr: 0
84090332030 0x4a478 [0x28]: PERF_RECORD_SAMPLE(IP, 2): 3774/3774:
0x87b4 period: 971083 addr: 0
84091308593 0x4a4a0 [0x28]: PERF_RECORD_SAMPLE(IP, 2): 3774/3774:
0x87b4 period: 978006 addr: 0
84092254638 0x4a4c8 [0x28]: PERF_RECORD_SAMPLE(IP, 2): 3774/3774:
0x87b4 period: 980940 addr: 0
84093261718 0x4a4f0 [0x28]: PERF_RECORD_SAMPLE(IP, 2): 3774/3774:
0x87b4 period: 983883 addr: 0
84094451903 0x4a518 [0x28]: PERF_RECORD_SAMPLE(IP, 2): 3774/3774:
0x87b4 period: 990897 addr: 0

total samples:
          SAMPLE events:       7571



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