imx6q restart is broken
Shawn Guo
shawn.guo at linaro.org
Thu Aug 16 23:48:56 EDT 2012
On Thu, Aug 16, 2012 at 11:34:46PM +0100, Russell King - ARM Linux wrote:
> This doesn't get around the problem that userspace can still effectively
> issue a DoS against the system by just running a dmb in a tight loop.
> Or maybe this would have a much more dramatic effect:
>
> while (1) {
> asm("dmb");
> asm("dmb");
> asm("dmb");
> asm("dmb");
> asm("dmb");
> asm("dmb");
> asm("dmb");
> asm("dmb");
> asm("dmb");
> asm("dmb");
> asm("dmb");
> asm("dmb");
> asm("dmb");
> asm("dmb");
> asm("dmb");
> asm("dmb");
> asm("dmb");
> asm("dmb");
> asm("dmb");
> asm("dmb");
> asm("dmb");
> asm("dmb");
> asm("dmb");
> asm("dmb");
> asm("dmb");
> asm("dmb");
> asm("dmb");
> }
>
> and make that 3 seconds to get a ps listing turn into something much
> longer?
>
>From my testing, no, it does not get the thing even worse.
> I think what needs to happen here (while we wait) is someone _with_ the
> problem needs to experiment, and find out how many nops are needed for
> the DMB not to have much effect in cpu_relax(). If it turns out we just
> need to put one nop in, then that's not _too_ bad.
At least, I need to have 5 nops to get rid of the issue, something like
below.
Regards,
Shawn
--8<---
diff --git a/arch/arm/include/asm/processor.h b/arch/arm/include/asm/processor.h
index 99afa74..3e1b099 100644
--- a/arch/arm/include/asm/processor.h
+++ b/arch/arm/include/asm/processor.h
@@ -80,7 +80,14 @@ extern void release_thread(struct task_struct *);
unsigned long get_wchan(struct task_struct *p);
#if __LINUX_ARM_ARCH__ == 6 || defined(CONFIG_ARM_ERRATA_754327)
-#define cpu_relax() smp_mb()
+#define cpu_relax() do { \
+ asm("nop"); \
+ asm("nop"); \
+ asm("nop"); \
+ asm("nop"); \
+ asm("nop"); \
+ smp_mb(); \
+ } while (0)
#else
#define cpu_relax() barrier()
#endif
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