imx6q restart is broken

[Russell King - ARM Linux]

On Fri, Aug 10, 2012 at 08:33:06AM -0500, Matt Sealey wrote:
> On Thu, Aug 9, 2012 at 4:07 PM, Russell King - ARM Linux
> <linux at arm.linux.org.uk> wrote:
> > On Thu, Aug 09, 2012 at 02:03:13PM -0500, Matt Sealey wrote:
> >> I have an irrelevant but possibly related question here; in
> >> mm/proc-v7.S there's this snip of code;
> >>
> >> #ifdef CONFIG_SMP
> >>         ALT_SMP(mrc     p15, 0, r0, c1, c0, 1)
> >>         ALT_UP(mov      r0, #(1 << 6))          @ fake it for UP
> >>         tst     r0, #(1 << 6)                   @ SMP/nAMP mode enabled?
> >>         orreq   r0, r0, #(1 << 6)               @ Enable SMP/nAMP mode
> >>         orreq   r0, r0, r10                     @ Enable CPU-specific SMP bits
> >>         mcreq   p15, 0, r0, c1, c0, 1
> >> #endif
> >>
> >> Which I am reading as, read the SMP bit from cp15 and see if it's
> >> enabled, or on UP set the SMP bit and then write it back
> >> regardless.
> >>
> >> On a system where !CONFIG_SMP but it's SMP-capable like i.MX6Q, ALT_UP
> >> method will get used and the SMP bit will get
> >> set regardless.
> >
> > I got here and stopped reading any further.  No, it doesn't work like
> > that; you don't understand the assembly.
> >
> > Yes, you're right that the ALT_UP version will be used.  This sets r0
> > to 1 << 6.  The very next instruction tests whether bit 6 is set in r0.
> > The following three instructions will only be executed _if_ that bit
> > was zero.
> 
> Right but, as I read it...
> 
> if (CONFIG_SMP)
>    read cp15
> else
>    set bit to one to hack it
> if (!smp)
>   set smp
>   write it back

Thank you for not reading what I wrote (or maybe you can't write back
what I said correctly, but either way, it's just making me think that
replying is a waste of time.)

> So who unsets the SMP bit? When the core goes down does it clear it,
> or are we just
> being safe for CPU startup? Does it still have an effect in the chip
> logic even if the core
> is 'not plugged'?

Generally we don't.  Because on secure mode devices, we can't write the
register, and if we tried to we'd get an abort.

So, if we detect a SMP capable CPU, we will enable the SMP bit if it
wasn't already enabled, and never ever attempt to disable it.

> What happens if you're in CONFIG_SMP and you say maxcpus=1?
> 
> > I'm assuming that the rest of your email is therefore irrelevant; I
> > have no desire to continue reading such a long message when the premise
> > it's (presumably) based upon is false.  If you have any further questions
> > please restate them succinctly after taking on board the above.  Thanks.
> 
> Please read the rest... I just didn't write first my question properly.

No, unless you can say what you want more succinctly, I'm not going
to bother reading your (apparantly regular) massive emails.