[PATCHv4 4/8] ARM: OMAP3: add manual control for mpu / core pwrdm usecounting

Kevin Hilman khilman at ti.com
Mon Aug 6 19:32:16 EDT 2012


Kevin Hilman <khilman at ti.com> writes:

> Tero Kristo <t-kristo at ti.com> writes:
>
>> mpu / core powerdomain usecounts are now statically increased
>> by 1 during MPU activity. This allows the domains to reflect
>> actual usage, and will allow the usecount to reach 0 just before
>> all CPUs are ready to idle. Proper powerdomain usecounts are
>> propageted to voltagedomain level also, and will allow vc
>> callbacks to be triggered at right point of time.
>>
>> Signed-off-by: Tero Kristo <t-kristo at ti.com>
>> Cc: Paul Walmsley <paul at pwsan.com>
>> Cc: Kevin Hilman <khilman at ti.com>
>
> IMO, the idea is fine, but I'm not crazy about the implementation in
> powerdomain.c, which is meant for pwrdm generic code.   In particular,
> I'm not crazy about the pwrdm lookups in powerdomain.c.
>
> Since pm<soc>.c already has references to mpu_pwrdm and core_pwrdm, why
> not just add the pwrdm_clkdm_enable/disable calls directly in pm<soc>.c
>
> Also, the changelog should be a bit more specific about why CORE
> powerdomain is also handled here when most of the code only talks about
> the CPU.

After playing with this some more, and doing a test hack of my idea
above, along with the per-pwrdm pre/post changes now in mainline, I
thinks this series should go one step further.

Basically, we should be able to get rid of the calls to
prdm_pre|post_transition that are outside the powerdomain code.  With
the addition of pwrdm_clkdm_enable|disable, it seems that the pre|post
transition calls should be called directly from
pwrdm_clkdm_enable|disable when the usecount transitions to/from zero.

Kevin






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